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LT5521 Very High Linearity Active Mixer
FEATURES
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DESCRIPTIO
Wideband Output Frequency Range to 3.7GHz +24.2dBm IIP3 at 1.95GHz RF Output Low LO Leakage: -42dBm Integrated LO Buffer: Low LO Drive Level Single-Ended LO Drive Wide Single Supply Range: 3.15V to 5.25V Double-Balanced Active Mixer Shutdown Function 16-Lead (4mm x 4mm) QFN Package
The LT(R)5521 is a very high linearity mixer optimized for low distortion and low LO leakage applications. The chip includes a high speed LO buffer with single-ended input and a double-balanced active mixer. The LT5521 requires only -5dBm LO input power to achieve excellent distortion and noise performance, while reducing external drive circuit requirements. The LO buffer is internally 50 matched for wideband operation. With a 250MHz input, a 1.7GHz LO and a 1.95GHz output frequency, the mixer has a typical IIP3 of +24.2dBm, -0.5dB conversion gain and a 12.5dB noise figure. The LT5521 offers exceptional LO-RF isolation, greatly reducing the need for output filtering to meet LO suppression requirements. The device is designed to work over a supply voltage range from 3.15V to 5.25V.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Cellular, W-CDMA, PHS and UMTS Infrastructure Cable Downlink Infrastructure Wireless Infrastructure Fixed Wireless Access Equipment High Linearity Mixer Applications
TYPICAL APPLICATIO
LO INPUT -5dBm 6.8pF
LO 110 IN+ 1:1 10pF 6.8pF IN-
GND
IF INPUT
OUT+ OUT-
2.7nH
OUTPUT POWER (dBm)
BPF
1nF
4:1
82pF
BPF 2.7nH PA 82pF RF OUTPUT
1nF
110
BIAS EN VCC VCC VCC
1nF 5V DC 1F
5521 TA01
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Fundamental, 3rd Order Intermodulation Distortion vs Input Power
20 0 PFUND -20 -40 IM3 -60 -80 -100 -14 -12 -10 -8 -6 -4 -2 PIN (dBm) fIF = 250MHz fLO = 1.7GHz fRF = 1.95GHz PLO = -5dBm TA = 25C 0 2 4 6
5521 TA02
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LT5521
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW
Power Supply Voltage ........................................... 5.5V Enable Voltage ............................... -0.2V to VCC + 0.2V LO Input Power ................................................ +10dBm LO Input DC Voltage ..................................... 0V to 1.5V IF Input Power ................................................. +10dBm Difference Voltage Across Output Pins ................ 1.5V Maximum Pin 2 or Pin 3 Current ......................... 34mA Operating Ambient Temperature Range .. - 40C to 85C Storage Temperature Range ................. - 65C to 125C Maximum Junction Temperature .......................... 125C
GND
GND
16 15 14 13 GND 1 IN
+
GND
LO
ORDER PART NUMBER
12 OUT+
LT5521EUF
2
IN- 3 GND 4 5 6
17
11 GND 10 GND 9 7 8 OUT-
VCC
VCC
UF PACKAGE 16-LEAD (4mm x 4mm) PLASTIC QFN
VCC
UF PART MARKING 5521
TJMAX = 125C, JA = 37C/W EXPOSED PAD (PIN 17) IS GND MUST BE SOLDERED TO PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
DC ELECTRICAL CHARACTERISTICS VCC = 5V, EN = 2.9V, TA = 25C unless otherwise noted.
Test circuit shown in Figure 1. (Note 2)
PARAMETER Supply Voltage Supply Current Shutdown Current Enable (EN) Low = Off, High = On Enable Mode Disable Mode Enable Current Shutdown Enable Current Turn-On Time (Note 3) Turn-Off Time (Note 4) LO Voltage (Pin 15) Input Voltage (Pins 2, 3) Internally Biased VCC = 5V, Internally Biased VCC = 3.3V, Internally Biased EN = High EN = Low EN = 5V EN = 0.2V 137 0.1 200 200 0.96 2.20 0.46 2.9 0.2 V V A A ns ns V V V EN = 0.2V CONDITIONS MIN 3.15 82 20 TYP MAX 5.25 98 100 UNITS V mA A
AC ELECTRICAL CHARACTERISTICS
Test circuit shown in Figure 1. (Note 2)
PARAMETER LO Frequency Range Input Frequency Range Output Frequency Range LO Input Power LO Return Loss Output Return Loss Input Return Loss (Pins 2, 3)
VCC = 5V, EN = 2.9V, TA = 25C unless otherwise noted.
MIN TYP 10 to 4000 10 to 3000 10 to 3700 -5 1 MAX UNITS MHz MHz MHz dBm dB dB dB
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CONDITIONS
ZO = 50, fLO = 1700MHz Requires Matching Requires Matching
EN
12 12 15
2
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W
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WW
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LT5521
AC ELECTRICAL CHARACTERISTICS
PARAMETER Conversion Gain Conversion Gain Variation vs Temperature Input P1dB Single-Side Band Noise Figure IIP3 IIP2 (Note 6) LO-RF Leakage LO-IF Leakage
VCC = 5V, EN = 2.9V, fIF = 250MHz, PIF = -7dBm, fLO = 1700MHz, PLO = -5dBm, fRF = 1950MHz, TA = 25C. Test circuit shown in Figure 1.
CONDITIONS MIN TYP -0.5 -0.009 +10 12.5 Two Tones, fIF = 5MHz, PIF = -7dBm/Tone Two Tones, fIF = 5MHz, PIF = -7dBm/Tone, fLO + fIF1 + fIF2 +24.2 +49 -42 -40 MAX UNITS dB dB/C dBm dB dBm dBm dBm dBm
VCC = 5V, EN = 2.9V, fIF = 44MHz, PIF = -7dBm, fLO = 1001MHz, PLO = -5dBm, fRF = 1045MHz, TA = 25C.
PARAMETER Conversion Gain Conversion Gain Variation vs Temperature Input P1dB Single-Side Band Noise Figure IIP3 IIP2 (Note 6) LO-RF Leakage LO-IF Leakage Two Tones, fIF = 5MHz, PIF = -7dBm/Tone Two Tones, fIF = 5MHz, PIF = -7dBm/Tone, fLO + fIF1 + fIF2 CONDITIONS MIN TYP -0.5 -0.012 +10 12.8 +24.5 +49 -38 -59 MAX UNITS dB dB/C dBm dB dBm dBm dBm dBm
VCC = 3.3V, EN = 2.9V, fIF = 250MHz, PIF = -7dBm, fLO = 1700MHz, PLO = -5dBm, fRF = 1950MHz, TA = 25C. (Note 5)
PARAMETER Conversion Gain Conversion Gain Variation vs Temperature Input P1dB Single-Side Band Noise Figure IIP3 IIP2 (Note 6) LO-RF Leakage LO-IF Leakage Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Specifications over the -40C to 85C temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Interval from the rising edge of the Enable input to the time when the RF output is within 1dB of its steady-state output. Two Tones, fIF = 5MHz, PIF = -7dBm/Tone Two Tones, fIF = 5MHz, PIF = -7dBm/Tone, fLO + fIF1 + fIF2 CONDITIONS MIN TYP -0.5 -0.013 +11 13.5 +25.8 +50 -36 -60 MAX UNITS dB dB/C dBm dB dBm dBm dBm dBm
Note 4: Interval from the falling edge of the Enable signal to a 20dB drop in the RF output power. Note 5: R1 = R7 = 22.6, Z1 = Z7 = 100nH. Note 6: Second harmonic distortion measured at fLO + fIF1 + fIF2.
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LT5521
TYPICAL DC PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage (5V Application)
100 95 90 85 85C
ICC (mA)
25C 80 75 -40C 70 65 60 4.7 4.8 4.9 5.1 5.0 VCC (V) 5.2 5.3
5521 G01
ICC (mA)
TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1700MHz, fIF = 250MHz, fRF = 1950MHz, PLO = -5dBm, VCC = 5V, EN = 2.9V, TA = 25C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 5V. Fundamental, 2nd and 3rd Order Intermodulation Distortion vs Input Power
20 0
OUTPUT POWER (dBm)
85C 25C -40C
PFUND
-20 -40
IM3 GC (dB)
-0.5 -1.0 -1.5 -2.0 85C
GC (dB)
IM2 -60 IM2 -80 IM3
-100 -14 -12 -10 -8 -6 -4 -2 PIN (dBm)
0
2
4
5521 G03
4
UW
6
Test circuit shown in Figure 1.
Supply Current vs Supply Voltage (3.3V Application)
110 100 85C 90 25C 80 -40C 70 60 50 3.1
3.2
3.3 VCC (V)
3.4
3.5
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Conversion Gain vs Input Power
1.0 0.5 0 -40C
Conversion Gain and IIP3 vs RF Frequency
10 8 6 IIP3 25 24 23
IIP3 (dBm)
25C
4 2 0 -2 -4 1750 85C 25C -40C
22 21 GC 20 19 18 2150
5521 G05
-2.5 0 -25 -20 -15 -10 -5 PIN (dBm)
5
10
15
1850
1950 RFOUT (MHz)
2050
5521 G04
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LT5521
TYPICAL AC PERFOR A CE CHARACTERISTICS
LO-RF Leakage vs LO Frequency
-36 -38 -40C
LEAKAGE (dBm)
fLO = 1700MHz, fIF = 250MHz, fRF = 1950MHz, PLO = -5dBm, VCC = 5V, EN = 2.9V, TA = 25C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 5V. Conversion Gain, IIP3 and Noise Figure vs Supply Voltage
10 8 6
GC (dB)
-40 -42 -44 -46 -48 1500 1550 1600 1650 1700 1750 1800 1850 1900 LO FREQUENCY (MHz)
5521 G06
85C
GC (dB)
25C
LO-RF Leakage vs LO Power
-32 -34 -36 -34 -36 -38
LO LEAKAGE (dBm)
LO LEAKAGE (dBm)
-38 -40C -40 -42 -44 -46 -48 -50 -25 -20 -15 -10 -5 0 LO POWER (dBm) 5 10 25C 85C
-40 -42 -44
-40C 85C 25C
NOISE FIGURE (dB)
5521 G09
Low Side LO (LS) and High Side LO (HS) Comparison: Conversion Gain and IIP3 vs RF Frequency
10 LS 8 6 GC (dB) LS: R1 = R7 = 110 4 HS: R1 = R7 = 121 fIF = 250MHz 2 0 -2 -4 1750 GC LS HS HS IIP3 26 24
13.5
NOISE FIGURE (dB)
1850
1950 RFOUT (MHz)
UW
Conversion Gain and IIP3 vs LO Power
30 10
IIP3 (dBm) AND NOISE FIGURE (dB)
25 24 IIP3 23
IIP3 (dBm)
IIP3
25 85C 25C -40C 20 15 10
8 6 4 2 0 -2 -4 -25 -20
4 2
NF
85C 25C -40C
22 21 GC 20 19 18 10
GC 0 -2 4.6 5 0 5.4
4.7
4.8
4.9
5.0 5.1 VCC (V)
5.2
5.3
0 -15 -10 -5 LO POWER (dBm)
5
5521 G07
5521 G08
LO-RF Leakage vs Supply Voltage
20 19 18 17 16 15 14 13 12 11
4.8 4.9 5.1 5.0 VCC (V) 5.2 5.3
5521 G10
Noise Figure vs LO Power
85C 25C
-46 -48 -50 4.7
-40C
10 -20
-15
-5 -10 LO POWER (dBm)
0
5
5521 G11
Low Side LO (LS) and High Side LO (HS) Comparison: Noise Figure vs RF Frequency
LS: R1 = R7 = 110 13.3 HS: R1 = R7 = 121 f = 250MHz 13.1 IF
22 IIP3 (dBm) 20 18 16 14 12 2150
5521 G13
12.9 12.7 12.5 12.3 12.1 11.9 11.7 11.5 1700 1750 1800 1850 1900 1950 2000 2050 2100 RFOUT (MHz)
5521 G14
HS LS
2050
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LT5521
TYPICAL AC PERFOR A CE CHARACTERISTICS
Fundamental, 2nd and 3rd Order Intermodulation Distortion vs Input Power
20 0 PFUND IM3
fLO = 1001MHz, fIF = 44MHz, fRF = 1045MHz, PLO = -5dBm, VCC = 5V, EN = 2.9V, TA = 25C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.045GHz output frequency. Conversion Gain and IIP3 vs RF Frequency, Fixed IF
10
-40C
OUTPUT POWER (dBm)
-20 GC (dB) -40 -60 -80 IM3 85C 25C -40C 2 4 6 IM2
IM2
-1.0 -1.5 -2.0
85C
GC (dB)
-100 -120 -14 -12 -10 -8 -6 -4 -2 0 INPUT POWER (dBm)
5521 G15
LO-RF Leakage vs LO Frequency
-32 -33 -34
LEAKAGE (dBm)
-35
GC (dB)
-37 -38 -39 -40 -41 -42 850 900 85C 25C
4 2
NF
14 10
GC (dB)
-36
-40C
950 1000 1050 1100 LO FREQUENCY (MHz)
5521 G18
LO-RF Leakage vs LO Power
-30 -32
LO LEAKAGE (dBm)
-34 -40C -36 25C -38 -40 -42 -25 -20 85C
LO LEAKAGE (dBm)
0 -15 -10 -5 LO POWER (dBm)
6
UW
1150
Conversion Gain vs Input Power
1.0 0.5 0 25C -0.5
25 24 IIP3 23 85C 25C -40C GC
IIP3 (dBm)
8 6 4 2 0 -2 -4 920
22 21 20 19 18 1170
5521 G17
-2.5 0 -25 -20 -15 -10 -5 PIN (dBm)
5
10
15
970
1020
1070
1120
RFOUT (MHz)
5521 G16
Conversion Gain, IIP3 and Noise Figure vs Supply Voltage
10 8 6 IIP3 85C 25C -40C 26
IIP3 (dBm) AND NOISE FIGURE (dB)
Conversion Gain and IIP3 vs LO Power
10 8 6 4 2 0 -2 -4 -25 -20 85C 25C -40C GC 20 19 18 10 IIP3 25 24 23
IIP3 (dBm)
22 18
22 21
GC 0 -2 4.6 6 2 5.4
4.7
4.8
4.9
5.0 5.1 VCC (V)
5.2
5.3
0 -15 -10 -5 LO POWER (dBm)
5
5521 G19
5521 G20
LO-RF Leakage vs Supply Voltage
-30 -32 -34 -36 -38 -40 -42 -44 4.6 -40C 25C 85C
5
10
4.7
4.8
4.9
5.0 VCC (V)
5.1
5.2
5.3
5.4
5521 G21
5521 G22
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LT5521
TYPICAL AC PERFOR A CE CHARACTERISTICS
Low Side LO (LS) and High Side LO (HS) Comparison: Conversion Gain and IIP3 vs RF Frequency
4 3 2
85C 25C
fLO = 1001MHz, fIF = 44MHz, fRF = 1045MHz, PLO = -5dBm, VCC = 5V, EN = 2.9V, TA = 25C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.045GHz output frequency. Low Side LO (LS) and High Side LO (HS) Comparison: Noise Figure vs RF Frequency
25 LS HS IIP3 24
NOISE FIGURE (dB)
14.0 13.5 13.0 HS 12.5 LS 12.0 11.5 11.0 945 fIF = 44MHz
Noise Figure vs LO Power
20 19 18
NOISE FIGURE (dB)
17
15 14 13 12 11 10 -20 -15 -40C
GC (dB)
16
-5 -10 LO POWER (dBm)
0
5521 G23
fLO = 1.7GHz, fIF = 250MHz, fRF = 1.95GHz, PLO = -5dBm, VCC = 3.3V, EN = 2.9V, TA = 25C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 3.3V. Conversion Gain and IIP3 vs RF Frequency
10
-40C
POUT, IM3 and IM2 vs Input Power
20 0
OUTPUT POWER (dBm)
0.5
POUT IM3
GC (dB)
-20 -40
GC (dB)
IM2 -60 IM2 -80 85C 25C -40C 0 2 4 6
-100 -14 -12 -10 -8 -6 -4 -2 PIN (dBm)
IM3
5521 G25
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5
fIF = 44MHz
23
IIP3 (dBm)
1 0 -1 -2 940
22 21 20 19 1140
5521 G34
GC HS
LS
990
1040 RFOUT (MHz)
1090
985
1025 1065 RFOUT (MHz)
1105
1145
5521 G24
Conversion Gain vs Input Power
8
27 25 IIP3 23
IIP3 (dBm)
0 -0.5 -1.0 85C -1.5 -2.0 -2.5 -20 25C
6 4 2 0 -2 85C 25C -40C GC
21 19 17 15
-15
-10
0 -5 PIN (dBm)
5
10
5521 G26
13 -4 1750 1800 1850 1900 1950 2000 2050 2100 2150 RFOUT (MHz)
5521 G27
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LT5521
TYPICAL AC PERFOR A CE CHARACTERISTICS
LO-RF Leakage vs LO Frequency
-32 -33 -34
LEAKAGE (dBm)
fLO = 1.7GHz, fIF = 250MHz, fRF = 1.95GHz, PLO = -5dBm, VCC = 3.3V, EN = 2.9V, TA = 25C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 3.3V. Conversion Gain, IIP3 and Noise Figure vs Supply Voltage
10
8 IIP3 6 20 85C 25C -40C NF 16 12 GC 8 24
85C 25C -40C
-35
GC (dB)
GC (dB)
-36 -37 -38
-39 -40 1500 1550 1600 1650 1700 1750 1800 1850 1900 LO FREQUENCY (MHz)
5521 G28
LO-RF Leakage vs LO Power
-30 -32 85C
LO LEAKAGE (dBm) NOISE FIGURE (dB)
18 16 85C 14 12 10 -20 25C -40C
LO LEAKAGE (dBm)
-34 -36 -38 25C -40 -42 -44 -25 -20
-40C
0 -15 -10 -5 LO POWER (dBm)
5
5521 G30
PI FU CTIO S
GND (Pins 1, 4, 10, 11, 13, 14, 16): Ground. These pins are internally connected to the Exposed Pad for improved isolation. They should be connected to RF ground on the printed circuit board, and are not intended to replace the primary grounding through the backside of the package. IN+, IN- (Pins 2, 3): Differential Input Pins. Each pin requires a resistive DC path to ground. See Applications Information for choosing the resistor value. External matching is required. EN (Pin 5): Enable Input Pin. The enable voltage should be at least 2.9V to turn the chip on and less than 0.2V to turn the chip off. VCC (Pins 6, 7, 8): Power Supply Pins. Total current draw for these three pins is 40mA. OUT+, OUT- (Pins 12, 9): RF Output Pins. These pins must have a DC connection to the supply voltage (see Applications Information). These pins draw 20mA each. External matching is required. LO (Pin 15): Local Oscillator Input. This input is internally DC biased to 0.96V. Input signal must be AC coupled. Exposed Pad (Pin 17): Circuit Ground Return for the Entire IC. For best performance, this pin must be soldered to the printed circuit board.
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UW
10
Conversion Gain and IIP3 vs LO Power
27 25 IIP3 6 4 2 0 -2 -4 -25 85C 25C -40C GC 23 IIP3 (dBm) 21 19 17 15 13 10
5521 G29
IIP3 (dBm) AND NOISE FIGURE (dB)
8
4 2 0
-2 4 3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50 VCC (V)
5521 G31
-20
-15
-10
-5
0
5
LO POWER (dBm)
Noise Figure vs LO Power
22 20 -20 -23 -26 -29 -32 -35 -38 -41 -44 -47 -50 -15 -10 -5 LO POWER (dBm) 0 5
5521 G32
LO Leakage vs Supply Voltage
85C
25C
-40C
3.0
3.1
3.2
3.3 VCC (V)
3.4
3.5
3.6
5521 G33
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LT5521
BLOCK DIAGRA
TEST CIRCUITS
LOIN 50 Z1 OPT C2 IFIN 50 Z3 Z14 R1 T1 C13 1 2 3 4 C6 R7 Z7 OPT
W
17 16 EXPOSED GND PAD GND IN+ IN - GND 15 LO 14 GND 13 GND 1 2 3 4 OUT+ GND GND OUT - 12 11 10 9 BIAS EN 5 6 VCC 7 VCC 8 VCC
5521 BD
C1
0.017" 0.062"
r = 4.4
RF GND DC
0.017" 16 GND GND IN+ IN- GND EN 5 R8 EN LT5521 EXPOSED PAD (17) VCC 6 VCC 7 15 L0 14 13 T2 12 11 10 L2 L1 C4 GND GND OUT+ GND GND OUT
GND C3 RFOUT 50 C12
-9
VCC 8 VCC C11
5521 F01
Figure 1. Demonstration Board Schematic
Table 1. Demonstration Board Bill of Materials1, 2
REF R1, R7 Z14 Z3 L1, L2 T1 T2 C1, C13 C3 C12 C2, C4, C6 C11 Z1, Z7 R8 fIF = 250MHz, fRF = 1.95GHz fIF = 44MHz, fRF = 1.045GHz fLO = 1.7GHz, VCC = 5V fLO = 1.001GHz, VCC = 5V 110, 1% 10pF 0 2.7nH M/A-COM MABACT00103 M/A-COM ETC1.6-4-2-3 6.8pF 82pF 82pF 1nF 1F 0 10k 110, 1% 120nH 150pF 10nH M/A-COM MABACT00103 M/A-COM ETC1.6-4-2-3 27pF 3.9pF 1nF 1nF 1F 0 10k fIF = 250MHz, fRF = 1.95GHz fLO = 1.7GHz, VCC = 3.3V 22.6, 1% 10pF 0 2.7nH M/A-COM MABACT00103 M/A-COM ETC1.6-4-2-3 6.8pF 82pF 82pF 1nF 1F 100nH 10k
THIS COMPONENT CAN BE REPLACED BY PCB TRACE ON FINAL APPLICATION
Note 1: Tabulated values are used for characterization measurements. Note 2: Components shown on the schematic are included for consistency with the demo board. If no value is shown for the component, the site is unpopulated. Note 3: T1 also M/A-COM ETC1-1-13 and Sprague Goodman GLSW4M202. These alternative transformers have been measured and have similar performance.
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LT5521
APPLICATIO S I FOR ATIO
IF RETURN LOSS (dB)
The LT5521 is a high linearity double-balanced active mixer. The chip consists of a double-balanced mixer core, a high performance LO buffer and associated bias and enable circuitry. The chip is designed to operate with a supply voltage ranging from 3.15V to 5.25V.
Table 2. Port Impedance
FREQUENCY (MHz) 50 100 300 600 1000 1500 2000 2300 3200 3500 4000 DIFFERENTIAL INPUT 19.8 + j0.7 20.1 + j2.0 18.2 + j5.3 15.2 + j16.8 14.5 + j28.1 20.5 + j42.3 48.2 + j26.8 18.2 + j29.4 22.4 + j125.1 DIFFERENTIAL OUTPUT 282.2 - j8.4 282.3 - j20.8 262.3 - j55.1 231.4 - j67.0 215.0 - j124.5 109.5 - j158.0 52.9 - j92.1 61.6 - j74.2 14.2 - j27.5 27.9 - j4.4 42.8 - j16.0 SINGLE-ENDED LO 49.9 + j0.1 49.8 + j0.3 49.2 + j0.9 47.7 + j2.0 45.3 + j2.8 43.3 + j2.8 43.0 + j3.3 43.4 + j4.6 44.6 + j14.0 42.4 + j17.9 38.6 + j22.8
Signal Input Interface Figure 2 shows the signal inputs of the LT5521. The signal input pins are connected to the common emitter nodes of the mixer quad differential pairs. The real part of the differential IN+/IN- impedance is 20. The mixer core current is set by external resistors R1 and R7. Setting their values at 110, the nominal DC voltage at the inputs is 2.2V with VCC = 5V. Figure 3 shows the input return loss for a matched input at 250MHz.
Z1 OPT C2 IFIN 50 R1 Z3 T1 1:1 Z14 2 C13 VCC IN - LT5521 IN +
3 C6 1nF R7 Z7 OPT
Figure 2. Signal Input with External Matching
10
U
0 -5 -10 -15 -20 -25 -30 -35 -40 100 150 200 300 250 FREQUENCY (MHz) 350 400
5521 F03
W
UU
Figure 3. IF Input Return Loss
For input frequencies above 100MHz, a broadband impedance matching tranformer with a 1:1 impedance ratio is recommended. Table 3 provides the component values necessary to match various IF frequencies using the M/ACOM CT0010 transformer (T1, Figure 1).
Table 3. Component Values for Input Matching Using the M/A-COM CT0010
IF 44MHz 95MHz 120MHz 150MHz 170MHz 250MHz 300MHz 435MHz 520MHz C2 1000pF 820pF 1000pF 330pF 330pF 82pF 15pF 8.2pF 6.8pF Z14 120nH 33pF 27pF 22pF 18pF 10pF 3.9pF 0.5pF Unused Z3 150pF 27nH 18nH 10nH 6.8nH 0 0 0 0
Below 100MHz, the Mini-Circuits TCM2-1T or the Pulse CX2045 are better choices for a wider input match. This configuration is shown in Figure 4. The series 1nF capacitors maintain differential symmetry while providing DC isolation between the inputs. This helps to improve LO suppression.
5521 F02
Shunt capacitor C13 (Figure 2) is an optional capacitor across the input pins that significantly improves LO suppression. Although this capacitor is optional, it is important to regulate LO suppression, mitigating part-to-part variation. This capacitor should be optimized depending
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LT5521
APPLICATIO S I FOR ATIO
C2 IFIN 50 T1 2:1 C13 1nF 3 R7 1nF R1 2 LT5521 IN +
VCC IN -
Figure 4. Low Frequency Signal Input
on the IF input frequency and the LO frequency. Smaller C13 values have reduced impact on the LO output suppression; larger values will degrade the conversion gain. A single-ended 50 source can also be matched to the differential signal inputs of the LT5521 without an input transformer. Figure 5 shows an example topology for a discrete balun, and Table 4 lists component values for several frequencies. The discrete input match is intrinsically narrowband. LO suppression to the output is degraded and noise figure degrades by 4dB for input frequencies greater than 200MHz. Noise figure degradation is worse at lower input frequencies.
C2 82pF IFIN 50
C16 L4
R1 110 2
LT5521 IN+ IN -
C14
C13 3 R7 110
L3 1nF
Figure 5. Alternative Transformerless Input Circuit Using Low Cost Discrete Components Table 4. Component Values for Discrete Bridge Balun Signal Input Matching
IF (MHz) 220 250 640 C14, C16 (pF) 22 18 4.7 L3, L4 (nH) 22 18 4.7
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Operation at Reduced Supply Voltage External resistors R1 and R7 (Figure 2) set the current through the mixer core. For best distortion performance, these resistors should be chosen to maintain a total of 40mA through the mixer core (20mA per side). At 5V supply, R1 and R7 should be 110. Table 5 shows recommended values for R1 and R7 at various supply voltages. Caution: Using values below the recommended resistance can adversely affect operation or damage the part.
Table 5. Minimum External Resistor Values vs Supply Voltage
VCC (V) 5 4.5 4 3.5 3.3 R1, R7 () 110 82.5 54.9 38.3 23.2
5521 F04
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Excessive mismatch between the external resistors R1 and R7 will degrade performance, particularly LO suppression. Resistors with 1% mismatch are recommended for optimum performance. Figure 2 shows RF chokes in series with R1 and R7. These inductors are optional. In general, the chokes improve the conversion gain and noise figure by 2dB at 3.3V (i.e., at the minimum values of R1 and R7). The DC resistance variation of the RF chokes must be considered in the 1% source resistance mismatch suggested for maintaining LO suppression performance. Figure 6 indicates the typical performance of the LT5521 as the external source resistance (R1, R7) is varied while keeping the supply current constant. Figure 6 data was taken without the benefit of input chokes, and shows the gradual gain degradation for smaller values of the input resistors R1 and R7. Figure 7 shows the typical behavior when the supply voltage is fixed and the core current is varied by adjusting values of the external resistors R1 and R7. Decreasing the core current decreases the power consumption and improves noise figure but degrades distortion performance. Figure 8 demonstrates the impact of the RF chokes in series with the source resistance at 3.3V. There is a 2dB improvement in conversion gain and noise figure and a corresponding decrease in IIP3.
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5521 F05
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LT5521
APPLICATIO S I FOR ATIO
3.5 2.5
CONVERSION GAIN (dB)
30 IIP3
IIP3 (dBm) AND NOISE FIGURE (dB)
25 20 15 10
TA = 25C f = 250MHz 1.5 fIF = 1.7GHz LO fRF = 1.95GHz 0.5 -0.5 GC -1.5 -2.5 0 20 40 80 100 60 R1 AND R7 () 120 NF
5 0 140
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Figure 6. IIP3, GC and Noise Figure vs External Resistance, Constant Core Current (Variable Supply Voltage)
1.8 TA = 25C fIF = 250MHz 1.2 fLO = 1.7GHz fRF = 1.95GHz VCC = 4V 0.6 0 NF -0.6 -1.2 -1.8 GC 10 5 0 30
IIP3 (dBm) AND NOISE FIGURE (dB)
25 IIP3 20 15
CONVERSION GAIN (dB)
15
20
25 30 35 CORE CURRENT (mA)
40
45
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Figure 7. IIP3, GC and Noise Figure vs Core Current, Constant Supply Voltage
9 IIP3 7
CONVERSION GAIN (dB)
30 25 RFC 20 NF 15 RFC 10 GC RFC 5 0
fRF = 1.95GHz TA = 25C 5 fIF = 250MHz VCC = 3.3V fLO = 1.7GHz 3 1 -1 -3
25
30
35 40 45 CORE CURRENT (mA)
50
55
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Figure 8. Comparison of 3.3V Performance With and Without Input RF Choke
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The user can tailor the biasing of the LT5521 to meet individual system requirements. It is recommended to choose a source resistance as large as possible to minimize sensitivity to power supply variation. Output Interface A DC connection to VCC must be provided on the PCB to the output pins. These pins will draw approximately 20mA each from the power supply. On-chip, there is a nominal 300 differential resistance between the output pins. Figure 9 shows a typical matching circuit using an external balun to provide differential to single-ended conversion. LO suppression and 2xLO suppression are influenced by the symmetry of the external output matching circuitry. PCB design must maintain the trace layout symmetry of the output pins as much as possible to minimize these signals. The M/A-COM ETC1.6-4-2-3 4:1 transformer (T2, Figure 9) is suitable for applications with output frequencies between 500MHz and 2700MHz. Output matching at various frequencies is achieved by adding inductors in series with the output (L1, L2) and DC blocking capacitor C3, as shown in Figure 9. Table 6 specifies center frequency and bandwidth of the output match for different matching configurations. Figure 10 shows the typical output return loss vs frequency for 1GHz and 2GHz applications. Capacitor C12 provides a solid AC ground at the RF output frequency.
LT5521 OUT+ L1 12 T2 4:1
IIP3 (dBm) AND NOISE FIGURE (dB)
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C3 OUT
300
VCC
VCC
OUT -
L2 9
C12
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Figure 9. Simplified Output Circuit with External Matching Components
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LT5521
APPLICATIO S I FOR ATIO
fOUT 2.4GHz 2.2GHz 2.0GHz 1.7GHz 1.3GHz 1.0GHz
5 0
Table 6. Matching Values Using M/A-COM ETC1.6-4-2-3 Output Transformer
L1, L2 0nH 1nH 2.7nH 4.7nH 10nH 10nH C3 82pF 82pF 82pF 82pF 82pF 3.9pF C12 82pF 82pF 82pF 82pF 82pF 1nF f (10dB RL) 450MHz 430MHz 400MHz 400MHz 400MHz 500MHz
CONVERSION GAIN (dB)
1GHz 2GHz
RETURN LOSS (dB)
-5 -10 -15 -20 -25 -30 0.7
1.2
1.7
2.2
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FREQUENCY (GHz)
Figure 10. Output Return Loss vs Frequency
For applications with LO and output frequencies below 1GHz, the M/A-COM MABAES0054 is recommended for the output component T2. This transformer maintains better low frequency output symmetry. Table 7 lists components necessary for a 750MHz output match using the M/A-COM MABAES0054.
Table 7. Matching Values Using M/A-COM MABAES0054 Output Transformer
fOUT 750MHz L1, L2 33nH C3 82pF C12 1nF f (10dB RL) 500MHz
Hybrid baluns provide a low cost alternative for differential to single-ended conversion. The critical performance parameters of conversion gain, IIP3, noise figure and LO suppression are largely unaffected by these transformers. However, their limited bandwidth and reduced symmetry outside the frequency of operation degrades the suppression of higher order LO harmonics, particularly 2xLO. Murata LBD21 series hybrid balun transformers, for example, can be used for output frequencies as low as 840MHz and as high as 2.4GHz.
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Johanson Technology supplies the 3700BL15B100S hybrid balun for use between 3.4GHz and 4GHz. With additional matching, this transformer can be used for applications between 3.3GHz and 3.7GHz. Example LT5521 performance is shown in Figure 11.
10 8 6 4 2 LS 0 -2 -4 3.2 GC LS HS 3.3 3.6 3.5 3.4 FREQUENCY (GHz) 3.7 3.8
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22 LS HS IIP3 TA = 25C fIF = 300MHz HS NF 14 12 10 8 18 16
IIP3 (dBm) AND NOISE FIGURE (dB)
20
Figure 11. LT5521 Performance for an Application Tuned to 3.5GHz with Low Side (LS) and High Side (HS) LO Injection
LO Interface The LO input pin is internally matched to 50. It has an internal DC bias of 960mV. External AC coupling is required. Figure 12 shows a simplified schematic of the LO input. Overdriving the LO input will dramatically reduce the performance of the mixer. The LO input power should not exceed +1dBm for normal operation. Select C1 (Figure 12) only large enough to achieve the desired LO input return loss. This reduces external low frequency signal amplification through the LO buffer. For applications with LO frequency in the range of 2.1GHz to 2.4GHz, the LT5521 achieves improved distortion and
LT5521
VCC C1 LOIN 50 15 8
60
60
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Figure 12. Simplified LO Input Circuit
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13
LT5521
APPLICATIO S I FOR ATIO
0 -5 RETURN LOSS (dB) -10 C1 = 6.8pF -15 -20 C1 = 2.7pF -25 -30 -35 0 500 1000 1500 2000 2500 3000 3500 4000 FREQUENCY (MHz)
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Figure 13. LO Port Return Loss
noise performance with slightly reduced current through the mixer core. Accordingly, in a 5V application operating within this LO frequency range, the recommended source resistor value (R1 and R7) is increased to 121. Enable Interface Figure 14 shows a simplified schematic of the EN pin interface. The voltage necessary to turn on the LT5521 is 2.9V. To disable the chip, the enable voltage must be below 0.2V. If the EN pin is not connected, the chip is disabled. It is not recommended, however, that any pins be left floating for normal operation. It is important that the voltage at the EN pin never exceed VCC, the power supply voltage, by more than 0.2V. If this should occur, the supply current could be sourced through the EN pin ESD protection diodes, potentially damaging the IC. The resistor R8 (Figure 1) in series with the EN pin on the demo board is populated with a 10k resistor to protect the EN pin to avoid inadvertant damage to the IC. For timing measurements, this resistor is replaced with a
LT5521
ACPR
ACPR AND AltCPR (dB)
VCC
EN 5
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Figure 14. Enable Input Circuit
14
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0 resistor. If the shutdown function is not required, then the EN pin should be wired directly to the VCC power supply on the PCB. Supply Decoupling The power supply decoupling shown in the schematic of Figure 1 is recommended to minimize spurious signal coupling into the output through the power supply. ACPR Performance Because of its high linearity and low noise, the LT5521 offers outstanding ACPR performance in a variety of applications. For example, Figures 15 and 16 show ACPR and Alternate Channel measurements for single channel and 4-channel 64 DPCH W-CDMA signals at 1.95GHz output frequency.
-30 -40 -50 -60 -70 ACPR -80 -90 30MHz OFFSET NOISE -100 -40 -165 0 OUTPUT CHANNEL POWER (dBm) -30 -20 -10 10
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TA = 25C fRF = 1.95GHz fIF = 70MHz fLO = 1.88GHz
-130 -135
NOISE FLOOR (dBm/Hz)
-140 -145 -150 -155 -160
Figure 15. Single Channel W-CDMA ACPR and 30MHz Offset Noise Performance
-50 -55 -60 ACPR -65 -70 -75 30MHz OFFSET NOISE TA = 25C fRF = 1.95GHz fIF = 70MHz fLO = 1.88GHz AltCPR -155 -160 -150 -135 -140 NOISE FLOOR (dBm/Hz) -145
-80 -165 -40 -15 -30 -25 -20 -35 OUTPUT CHANNEL POWER, EACH CHANNEL (dBm)
1635 G24
Figure 16. 4-Channel W-CDMA ACPR, AltCPR and 30MHz Offset Noise Floor
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LT5521
APPLICATIO S I FOR ATIO
Figure 17. Top View of Demo Board
PACKAGE DESCRIPTIO
UF Package 16-Lead Plastic QFN (4mm x 4mm)
(Reference LTC DWG # 05-08-1692)
BOTTOM VIEW--EXPOSED PAD 4.00 0.10 (4 SIDES) 0.72 0.05 PIN 1 TOP MARK (NOTE 6) 2.15 0.10 (4-SIDES) 0.75 0.05 R = 0.115 TYP 0.55 0.20 15 16
4.35 0.05
2.15 0.05 (4 SIDES)
2.90 0.05
PACKAGE OUTLINE 0.30 0.05 0.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.200 REF 0.00 - 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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1 2
(UF) QFN 1103
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0.30 0.05 0.65 BSC
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LT5521 RELATED PARTS
PART NUMBER Infrastructure LT5511 LT5512 LT5514 LT5515 LT5516 LT5517 LT5519 LT5520 LT5522 High Linearity Upconverting Mixer DC-3GHz High Signal Level Downconverting Mixer Ultralow Distortion, Wideband Digitally Controlled Gain Amplifier/ADC Driver 1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 40MHz to 900MHz Quadrature Demodulator 0.7GHz to 1.4GHz High Linearity Upconverting Mixer 1.3GHz to 2.3GHz High Linearity Upconverting Mixer 600MHz to 2.7GHz High Signal Level Downconverting Mixer RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer DC to 3GHz, 21dBm IIP3, Integrated LO Buffer BW = 850MHz, OIP3 = 47dBm at 100MHz, 22.5dB Gain Control Range 20dBm IIP3, Integrated LO Quadrature Generator 21.5dBm IIP3, Integrated LO Quadrature Generator 21dBm IIP3, Integrated LO Quadrature Generator 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50 Matching, Single-Ended LO and RF Ports Operation 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50 Matching, Single-Ended LO and RF Ports Operation 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50 Single-Ended RF and LO Ports 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.25V Supply 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply 100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply 44dB Dynamic Range, Temperature Compensated, SC70 Package 36dB Linear Dynamic Range, Low Power Consumption, SC70 Package Precision VOUT Offset Control, Shutdown, Adjustable Gain Precision VOUT Offset Control, Shutdown, Adjustable Offset Precision VOUT Offset Control, Adjustable Gain and Offset 60dB Dynamic Range, Temperature Compensated, SC70 Package 1.8V to 5.25V Supply, Dual-Gain LNA, Mixer, LO Buffer 1.8V to 5.25V Supply, 70MHz to 400MHz IF, 84dB Limiting Gain, 90dB RSSI Range 1.8V to 5.25V Supply, Four-Step RF Power Control, 120MHz Modulation Bandwidth 1.8V to 5.25V Supply, 40MHz to 500MHz IF, -4dB to 57dB Linear Power Gain, 8.8MHz Baseband Bandwidth 17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V Supply, -7dB to 56dB Linear Power Gain Multiband GSM/DCS/GPRS Mobile Phones Multiband GSM/DCS/GPRS Mobile Phones Multiband GSM/DCS/GPRS Mobile Phones Multiband GSM/DCS/GPRS Phones, 45dB Dynamic Range, 450kHz Loop BW Multiband GSM/DCS/GPRS Phones, 45dB Dynamic Range, 250kHz Loop BW Multiband GSM/GPRS/EDGE Mobile Phones
5521f
DESCRIPTION
COMMENTS
RF Power Detectors LT5504 LTC(R)5505 LTC5507 LTC5508 LTC5509 LTC5530 LTC5531 LTC5532 LT5534 LT5500 LT5502 LT5503 LT5506 LT5546 800MHz to 2.7GHz RF Measuring Receiver RF Power Detectors with >40dB Dynamic Range 100kHz to 1000MHz RF Power Detector 300MHz to 7GHz RF Power Detector 300MHz to 3GHz RF Power Detector 300MHz to 7GHz Precision RF Power Detector 300MHz to 7GHz Precision RF Power Detector 300MHz to 7GHz Precision RF Power Detector 50MHz to 3GHz RF Power Detector 1.8GHz to 2.7GHz Receiver Front End 400MHz Quadrature IF Demodulator with RSSI 1.2GHz to 2.7GHz Direct IQ Modulator and Upconverting Mixer 500MHz Quadrature IF Demodulator with VGA 500MHz Ouadrature IF Demodulator with VGA and 17MHz Baseband Bandwidth RF Power Controller RF Power Controller RF Power Controller SOT-23 RF PA Controller SOT-23 RF PA Controller RF Power Controller for EDGE/TDMA
Low Voltage RF Building Blocks
RF Power Controllers LTC1757A LTC1758 LTC1957 LTC4400 LTC4401 LTC4403
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
LT/TP 0604 1K * PRINTED IN THE USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2004

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